If you want to take the temperature of the state of electronics design, don’t miss DesignCon’s traditional opening night panel.
It’s going to be different this time.
2016 will be 14th year that The Jitter Panel (well, the official title filtered through our marketing department is The Case of the Closing Eye) hosted by Chris Loberg and executed (or perhaps immoderated) by yours truly, will kick off the annual familEE reunion that we call DesignCon. The panel puts test and measurement gurus face-to-face with problems from their most challenging customers. The difference is that, this time, the T&M people don’t have their pre-planned bill of goods for sale—not a lot of new automated tests, crazier acronyms, higher bandwidths, contradictory product names—no, this time they’re more like confused 7th graders at the school dance. They want to dance, but they don’t know how to attract the ASIC and FPGA designers onto the floor.
You probably felt the wind shift as line rates surpassed 25 Gbit/s and PAM4 (4-level pulse amplitude modulation) pushed aside the simple, intuitive high/low, 1/0 baseband digital signals that we used to call NRZ (non-return to zero) but will soon be calling PAM2 (it is, after all, 2-level pulse amplitude modulation). Seems like yesterday that we could look at a signal and read logic levels from waveforms, but the truth is that ISI (inter-symbol interference) has been eating our lunch for years.